Concept Engineering GmbH
Concept Engineering is a privately held company based in Freiburg, Germany. It was, founded in 1990 to develop and market innovative schematic generation and viewing technology for use with logic synthesis, verification, test automation and physical design tools.
- 49 761-47094-0
- 49 761-47094-29
- info@concept.de
- Bötzinger Str. 29
Freiburg, 79111
Germany
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product
Netlist Analyzer
GateVision
GateVision PRO is the third generation of graphical netlist analyzers from Concept Engineering. Completely rewritten to run on modern 32/64bit platforms, GateVision PRO provides the designer of even the largest chips with intuitive design navigation, schematic viewing, logic cone extraction and interactive logic cone viewing for debug support and design documentation.
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Widgets - Automatic Schematic Generation
Nlview
Concept Engineering's Nlview engine provides automatic generation of schematic diagrams for different levels of electronic circuits, including gate-level, RTL and block-level. Optional engines are available for the system-level (S-engine) and for the transistor-level (T-engine). The schematic layout can be modified and controlled by human intervention and always optimized by algorithms. A fine granularity of user preferences can be mixed with machine computed "beauty" to get the best human readable diagrams. Interactive circuit exploration is supported by incremental schematic generation technology. Nlview provides a set of APIs and interfaces with a certain GUI environment. Please see also the Nlview Widgets datasheet (PDF file).
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RTL debugger and viewer for Verilog and VHDL
RTLvision
RTLvision PRO provides easy RTL debugging and fast visualization of RTL code, so that engineers can easily understand, implement and optimize VHDL, Verilog or SystemVerilog code. Please check out the Demo Videos: Basic Features and Clock Tree Analyzer.
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SPICE circuits & model Debugger / Analyzer
SpiceVision PRO
SpiceVision PRO takes the complex SPICE descriptions produced by many EDA tools and generates clean, easy-to-read transistorlevel schematics and circuit fragments, and design documentation to speed up debugging and project development.
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High Performance Netlist Debugging and Netlist Viewing
GateVision PRO is the third generation of graphical gate-level netlist analyzers and netlist viewers from Concept Engineering. Please check out the Demo Video: Basic Features. Completely rewritten to run on modern 32/64bit platforms, GateVision PRO provides the designer of even the largest chips and SoCs with intuitive design navigation, netlist viewing, waveform viewing, logic cone extraction, interactive logic cone viewing for netlist debugging and design documentation.
