Intellitech Corp.
Intellitech provides comprehensive solutions for debug, configuration and test of ICs, PCBs and Systems. Products include ICs and IP for designing multi-PCB systems for self-test and in-the-field configuration to production parallel PCB testers and FLASH device programmers
- (603) 750-7116
- (603) 750-4173
- scansales@intellitech.com
- 69 Venture Drive
Dover,, NH 03820
United States
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Complete IP Module
Scan Ring Linker SRL
The Scan Ring Linker SRLTM - is a complete IP module that can be easily embedded into a CPLD, FPGA or ASIC on a PCB to reduce the complexities and costs of designing 1149.1 (JTAG) test infrastructure for designs that use multiple scan rings. The SRL IP module links any number of scan rings (secondary scan paths) into a single high-speed test bus, which permits devices on secondary scan chains to be independently tested and configured through a single 1149.1 external interface.
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DFT Validation And Silicon Debug Platform
NEBULA Silicon Debugger
NEBULA provides advanced features for performing early validation of DFT infrastructure and ATPG patterns in first silicon. The NEBULA solution directly imports test pattern formats and DFT information from leading EDA vendor tools, such as Synopsys' TetraMAX and Cadence's Encounter Test.
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Eclipse Test Development Environment
The Eclipse Test Development Environment automatically creates tests that are used to bring up new products in the lab. Failures can be quickly debugged using software tools such as the Eclipse Timing Diagram Analyzer and the Schematic Logic Probe.
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Manufacturing Test Station
Scan Executive
The Scan ExecutiveTM Manufacturing Test Station is used to apply the same IEEE 1149.1 tests that were developed and used in the lab in a high-volume manufacturing environment without requiring additional development.
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Develop - Simulate - Validate JTAG / IJTAG based IP
NEBULA
You, your vendors and your customers being able to use one common interface to control and observe on-chip IP, resources and instruments. The figure below shows an example IC. The new IEEE 1149.1-2013 standard supports an init-data register for configuring the analog paramaters of I/O as well as controlling on-chip PLLs. The standard further extends this by defining in BSDL user test data registers or 'scan chains'. These registers enable the ability of generic software to control and observe mission mode IP and instruments simply by describing the register interface in BSDL.
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PCB Test And Design-For-Test Services Group
ntellitech has a very experienced consulting and test development organization that is dedicated to provide our customers with high-quality design and test services. Choosing Intellitech Test Services can help you lower the risk of adopting a new Design-for-Test methodology or speed your product to market when you need to deploy a test solution quickly.
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Production PCB Combinational Tester
The PT100Pro combines ARM Functional Test, Analog Test and Boundary Scan in one platform for testing up to 32 PCBs at a time. The PT100 Pro solves the test challenges and cost requirements of testing small, high-volume PCBs used in the home, mobile, entertainment, automotive and embedded markets. PCBs in these markets are cost sensitive yet require high volume, high fault coverage on leading edge technologies such as WiFi, DDR Memory, USB, Bluetooth, Nand Flash, MPEG decoders, Power Management Units, and MMC/Smart Cards interfaces.
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Embedded Configuration And Test Processor
SystemBIST
The SystemBISTTM Embedded Configuration and Test Processor - is a complete plug-and-play IP module built upon a unique patent-pending architecture. The SystemBIST processor is embedded onto a PCB, which enables design engineers to build high quality, self-testable and in-the-field re-configurable products. SystemBIST is vendor independent and can configure any IEEE 1532 or IEEE 1149.1 compliant FPGA and CPLD in-system.
