Verified Systems International GMBH
Provides tools for highly automated testing and verification. Performs verification, validation and test services for your products and development projects. Offers consultancy and training courses about the most successful state-of-the-art methods for verification, validation and test of safety- or mission-critical systems.
- +49 421 57204-0
- +49 421 57204-22
- info@verified.de
- Am Fallturm 1
Bremen, 28359
Germany
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product
Code Coverage Branch Monitor
CCBM
Verified Systems International GMBH
The Code Coverage Branch Monitor (CCBM) is a set of utilities that allow instrumentation of C source code for the purpose of branch coverage measurement. This encompasses operations for code instrumentation, removal of this instrumentation, retrieval of coverage information, merging coverage information, and displaying this information with reference to the (original) source code.
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Source to Object Code Analyser
RTT-STO
Verified Systems International GMBH
RTT-STO is a software analysis tool-suite that automatically performs static program analyses of C code and assembly required to receive certification credit for source-to-object code validation in the context of safety-critical avionics software.
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Model Based Testing
RTT-MBT
Verified Systems International GMBH
The RT-Tester Model Based Test Case and Test Data Generator (RTT-MBT) supports model-based testing (MBT), that is, automated generation of test cases, test data, and test procedures from UML/SysML models. Moreover, it generates traceability data relating requirements, test cases, test procedures, and results.
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Test Automation System
RT-Tester
Verified Systems International GMBH
Designed to perform automated hardware-in-the-loop tests and software component test on process or thread level for embedded real-time systems. The functional components of RT-Tester can be structured as shown in the figure to the left. Please click on the small image to enlarge the picture. The System Under Test (SUT) denotes the object to be tested.
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Test Engines
Verified Systems International GMBH
The test system cluster architecture is based on dual CPU or 4-CPU PCs acting as cluster nodes. The nodes communicate and synchronise over a high-speed network (Myrinet or InfiniBand). A modification of the Linux operating system allows to run the test execution and evaluation algorithms in hard real-time on reserved CPUs, where scheduling is non-preemptive and controlled by the test system itself. The interrupts caused by interfaces to the system under test may be relayed to CPUs designated explicitly for their handling. This approach offers the opportunity to utilise high-performance standard hardware and the services provided by the widely accepted Linux operating system in combination with all mechanisms required for hard real-time computing. The cluster architecture presents an opportunity to distribute interfaces with high data throughput on different nodes, so that PCI bus overload can be avoided. In addition, the CPU load can be balanced by allocating test data generators, environment simulations and checkers for the behaviour of the system under test ("test oracles") on dedicated CPUs.
