Foundation IP

TSMC - DOLPHIN Design

Our Foundation IPs embed power management features (multi-Vt/multi-channel libraries, multi-VDD characterization, integrated power-switches, source-biasing…) which allow designers to explore the SoC architecture. Optimal configurations can be generated to meet the application’s Performance, Power and Area constraints. We also complement our offering to reach best-in-class Energy Efficient SoC by serving Always-On power-domains with a dedicated offer, optimized to achieve the ultra-low-power requirements of battery-operated devices in sleep mode.