FPGA/FMC Carriers
Our AMC FPGA modules feature Altera Stratix IV, Altera Stratix V, Xilinx Virtex-5, Xilinx Virtex-6, Xilinx Zynq, Xilinx Artix, Xilinx Virtex-7 and Xilinx Kintex-7 FPGAs. We also offer a range of carriers that can accommodate standard FMCs featuring FPGAs from Altera and Xilinx, including the new Xilinx UltraScale family.
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PCIe FPGA Carrier For FMC, Virtex UltraScale™
PCI595
The PCI595 is based on the Xilinx XCVU440 Virtex UltraScale FPGA, which provides 2,880 DSP slices, 88.6 Mb RAM and 5,541,000 logic cells. The FPGA interfaces directly to the FMC DP 0-9 and all FMC LA/HA/HB pairs, making it compatible with a wide range of industry standard VITA 57 modules. It also has interface to one DDR4, 64-bit wide, with 8 GB total memory. This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.
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PCIe FPGA Carrier For FMC+, Kintex UltraScale™
PCI592
The PCI592 is based on the Xilinx XCKU115 Kintex UltraScale FPGA, which provides 5,520 DSP slices, 75.9 Mb RAM and 1,451,000 logic cells. The FPGA interfaces directly to the FMC+ DP-23 and all FMC+ LA/HA/HB pairs, making it compatible with a wide range of industry standard VITA 57 modules. It also has interface to three DDR4 memory channels (2x 64-bit wide and 1x 32-bit wide). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host. The unit has x8 PCIe edge connector routed to the FPGA PCIe Gen3 hard IP block. In addition, 16 uncommitted connection pairs are routed to a dual x8 expansion connector, providing direct connectivity to a neighbouring FPGA (e.g. via Aurora, 10G/40G, SRIO, PCIe) without the need to go through the host.
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PCIe FPGA Carrier For FMC, Virtex-7
PCI516
The PCI516 is based on the Xilinx Virtex-7 690T, which provides 3,600 DSP slices, 52,920 Kb RAM and 690,000 logic cells. The FPGA interfaces directly to the FMC DP 0-9 and all FMC LA/HA/HB pairs, making it compatible with a wide range of industry standard VITA 57 modules. It also has interface to three DDR3 memory channels (64-bit wide and 16-bit wide). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host. The unit has x8 PCIe edge connector routed to the FPGA PCIe Gen3 hard IP block. In addition, 16 uncommitted connection pairs are routed to a dual x8 expansion connector, providing direct connectivity to a neighbouring FPGA (e.g. via Aurora, 10 G/40 G, SRIO, PCIe) without the need to go through the host.
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PCIe FPGA Carrier For FMC+, VU13P UltraScale+TM
PCI596
The PCI596 is based on the Xilinx VU13P UltraScale+TM FPGA, which provides over 12,000 DSP slices, 360 Mb of UltraRAM and 3,780K logic cells. The FPGA interfaces directly to the FMC+ DP 0-31 and all FMC+ LA/HA/HB pairs, making it compatible with a wide range of industry standard VITA 57 and VITA 57.4 modules. It also has interface to DDR4 memory channels (1x 64-bit wide, 8 GB). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host. PCI596 has x16 PCIe edge connector routed to the FPGA PCIe Gen4 hard IP block. In addition, 16 uncommitted connection pairs are routed to a dual x8 expansion connector, providing direct connectivity to a neighbouring FPGA (e.g. via Aurora, 10/40GbE, SRIO, PCIe) without the need to go through the host.
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PCIe FPGA Carrier For FMC+, Altera Arria-10 GX1150
PCI536
The PCI536 is based on the Altera Arria-10™ GX1150 FPGA in F1517 package. The FPGA interfaces directly to the FMC+ DP 0-23 (single connector) and all FMC+ LA/HA/HB pairs, making it compatible with a wide range of industry standard VITA 57 modules. The PCI536 has x8 PCIe edge connector routed to the FPGA PCIe Gen3 hard IP block. It also has interface to two DDR4, 64-bit wide, with 16 GB total memory. This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.
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PCIe VU13P UltraScale+TM With Massive Optical I/O
PCI597
The PCI597 is based on the Xilinx VU13P UltraScale+TM FPGA, which provides over 12,000 DSP slices, 360 Mb of UltraRAM and 3,780K logic cells. The Unit provides active cooling of the FPGA making it appropriate for power-hungry applications or those requiring temperature stability for good performance. The FPGA has interface to DDR4 memory channels (single bank of 64-bit wide, 16 GB). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.
