User Programmable Logic

PCIe-Spartan-VI - Dynamic Engineering (Dynamic Engineering)

User Programmable logic - Spartan VI 100 with 40 differential and 12 TTL IO plus PLL(24). 16 DMA ports, to support 8 full duplex byte lanes between the Bus and User FPGAs. Additional GPB interface to support R/W operations to registers etc. Driver and reference SW package includes user defined R/W to User FPGA to support User Architecture without a new driver.