Counters/Encoders/Decoders
The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all 0's state and disables the oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of 1 (and 0). All inputs and outputs are fully buffered. Schmitt trigger action on the clock pin permits unlimited clock rise and fall time.
