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Semiconductor Substrate
thin crystalline material sliced from ingot.
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High Volume Semiconductor Substrate Interconnect Tester
GATS-2100
Pre-align *load *CCD camera alignment *electrical test * unload * sort of pass, opens, shorts, and alignment errors.The GATS-2100 concurrent approach provides unmatched volume capability... 2.5 seconds per device. As with all Nidec-Read Test systems, the GATS-2100 offers you the most test technologies for your requirements
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Fastest Flying Probe Test System for Semiconductor Substrate Interconnect Test
GATS-3200
* Test individual packages or * Test Multi-image panels with Step&Repeat Function * single flying probe top using very high speed voice coil motor (VCM) technology * 50 - 100 tests per second ... high throughput * Dual Flying Probe Top for testing bump-to-bump nets * flying probe head allows testing of all nets including each power and ground point * 4-wire test capability
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Electrostatic Chucks
Chucks grip for micropatterning, temperature control, or robotics ...*insulating substrates,*hard disk drive head substrates,*semiconductor wafers,*InP-coated sapphire,*metal foils,*... and many other materials.
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Custom Coatings
MICROMATTER provides custom coating services (single or multi-layer) on customer supplied glass, metal and semiconductor substrates.
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Electrostatic chucks
Semiconductor substrates such as Si wafers or masks for the next generation of extreme ultraviolet lithography (EUVL) are handled in a vacuum. For nm structures and exact overlay, the reproducibility of the substrate evenness is a crucial factor, as unevenness results in structural distortions. Particles are problematic and heat input as well as thermal expansion must be taken into account.
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Defect Inspection Systems
Candela® defect inspection systems detect and classify a wide range of critical defects on compound semiconductor substrates (GaN, GaAs, InP, sapphire, SiC, etc.) and hard disk drives, with high sensitivity at production throughputs.
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Molded Interconnect Subtrate
A substrate interposes between an IC chip and a motherboard to enable the IC chip to communicate with the motherboard effectively. Typically, the IC chip is attached onto the substrate and assembled into an IC package before connecting to the motherboard. It is an essential part of the IC package and is responsible for a successful packaging process. Also, it plays an important role in making the IC chip to become a real product and a real solution for end customers. In the past years, semiconductor technologies were highly driven by PC applications which follow Moore’s law in technology migration. In recent years, the emergence of mobile applications increasingly, become the main driver in the semiconductor industry. These mobile applications requires a new kind of substrate that have ability for making IC packages with smaller form factor, thin profile, better thermal, mechanical and electrical performance.
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Wafer Analysis Systems
Tropel®
Corning Specialty Materials has a long heritage of providing solutions to semiconductor equipment manufacturers. The Tropel line of wafer analysis equipment enables measurement of wafer substrates from 2” to 450mm regardless of material type and surface finish.
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Automatic Online Flatness and Surface Appearance System
UltraSort200
The UltraSort continues our 25 year tradition of providing metrology solutions to semiconductor wafer manufacturers. Designed for volume wafer production, this automated system offers superior performance in rapid, repeatable, accurate, noncontact qualification of silicon and alternative substrate wafers.
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Software
MOS Doping Profile Analysis
Materials Development Corporation
MDC uses the comprehensive Ziegler algorithm toconvert pulsed MOS C-V data to a doping profile. The doping profile is accurate from the oxide semiconductor interface to the maximum depletion depth and is therefore useful for low dose ion implant monitoring. Peak doping, range, and total active dose are computed. The technique is sensitive enough to resolve changes in the substrate doping profile due to redistribution during oxidation.
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Non-Contact Mapping Life Time System
MWR-2S-3
The device is designed for express non-destructive contactless local measurement of non-equilibrium charge carrier effective lifetime in silicon substrates, epi-wafers and solar cells at different stages of manufacturing cycle. It can be used for incoming and outcoming inspection of silicon ingots and wafers, tuning and periodic inspection of semiconductor and solar cell technology quality. Lifetime determination is based on measuring photoconductivity decay after pulselight photo-exciting with usage of reflected microwave as a probe.
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Reticle Manufacturing
An error-free reticle (also known as a photomask or mask) represents a critical element in achieving high semiconductor device yields, since reticle defects or pattern placement errors can be replicated in many die on production wafers. Reticles are built upon blanks: substrates of quartz deposited with absorber films. KLA’s portfolio of reticle inspection, metrology and data analytics systems help blank, reticle and IC manufacturers identify reticle defects and pattern placement errors, thereby reducing yield risk.
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Automated Front & Backside Mask Aligner System
Model 6000
With over 4 decades of manufacturing in the semiconductor industry, OAI meets the growing challenge of a dynamic market with an elite class of production photolithography equipment. Built on the proven OAI modular platform, the Model 6000 has front and backside alignment that is fully automated with a submicron printing capability as well as submicron top to bottom front side alignment accuracy which delivers performance that is unmatched at any price. Choose either topside or optional backside alignment which uses OAI’s customized advanced recognition pattern software. These Mask Aligners have OAI’s Advanced Beam Optics with better than ±3% uniformity and a throughput of 200 wafers per hour in first mask mode, which results in higher yields. The Series 6000 can handle a wide variety of wafers from thick and bonded substrates (up to 7000 microns), warped wafers (up to 7 mm-10mm), thin substrates (down to 100 micron thick), and thick photo resist.
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Packaging Manufacturing
KLA’s extensive portfolio of packaging solutions accelerates the manufacturing process for outsourced semiconductor assembly and test (OSAT) providers, device manufacturers and foundries for a wide range of packaging applications. Innovations in advanced packaging, such as 2.5D/3D IC integration using through silicon vias (TSVs), wafer-level chip scale packaging (WLCSP), fan-out wafer-level packaging (FOWLP) and heterogeneous integration as well as a wide range of IC substrates create new and evolving process requirements. KLA offers systems for packaging inspection, metrology, die sorting and data analytics focused on meeting quality standards and increasing yield before and after singulation. SPTS provides a broad range of etch and deposition process solutions for advanced packaging applications. Orbotech offers a portfolio of technologies that includes automated optical inspection (AOI), automated optical shaping (AOS), direct imaging (DI), UV laser drilling, inkjet/additive printing and software solutions to ensure manufacture of the highest quality of IC substrates.
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SOI Bonding Systems
An accurate wafer bonding process is the key factor in obtaining high quality single crystalline silicon films on insulating substrates. The EVG850 SOI/Direct Wafer Bonding systems are designed to fulfill a wide range of fusion/molecular wafer bonding applications, with main focus on SOI substrates manufacturing. Ultra clean handling of wafers throughout the bonding process assures high-yield and void-free bonds. All essential steps, from cleaning and alignment to pre-bonding and IR-inspection are combined in one high volume production system. EVG850 is the only production bonding system built to operate in high throughput, high-yield environments and guarantees void-free SOI wafers up to 300 mm.The EVG300 series single wafer cleaning systems are designed for efficient removal of particles. In semiconductor processing, efficient cleaning and particles removal prior to critical process steps enables maximum yield. Wafer Bonding is a process which is strongly affected by particles: each particle on the wafer surface produces a void orders of magnitude larger than its diameter, contributing to a dramatic yield loss.
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Metrology Solutions for Semiconductors
Bruker Semiconductor develops, manufactures, markets, and supports metrology solutions for thin films, which are based on novel, rapid, non-contacting and non-destructive X-ray technology. With Bruker’s acquisition of Jordan Valley Semiconductors, a name synonymous with unparalleled worldwide customer service and support, 75% of the world's top 25 semiconductor manufacturers rely on Bruker metrology tools for front-end and back-end applications, including development of their next-generation thin films. Bruker commitment to innovation and technology leadership drives the continued release of new advancements in metrology, and has garnered numerous awards and industry recognition. In applications ranging from C-S thin films materials characterization to wafer substrate analysis and defect detection, Bruker’s systems provide simulation analysis and fit. HRXRD, XRR, WA-XRD, and XRDI measurement types are fully supported, enabling researchers, production engineers, and process developers unparalleled capabilities. Whether you are a semi and C-S fabricator, R&D center or academy, or an industry materials research facility, Bruker has a specifically designed solution for your metrology needs.
