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Validation

confirmation of acceptance.

See Also: Accreditation, Certification, Qualification


Showing results: 316 - 321 of 321 items found.

  • Ethernet

    Teledyne LeCroy

    Ethernet, arguably the most common communication protocol on the planet, continues to spread into new markets and incorporates new protocols; it presents today’s Ethernet engineers with host of new test and validation challenges. Specifically, the increasing adoption of lossless Ethernet standards like FCoE, RoCE, and NVMf and increases in the line-rates of Ethernet from 10GbE and soon to 100Gb/s to name a few.These new physical and logical communications standards have exposed legacy test tools as outdated and incomplete for Ethernet product developers and the ecosystem. Teledyne LeCroy is addressing these needs by leveraging our extensive experience in high-speed serial data analysis tools currently used by many of the same companies developing products for NAS, SAN, LAN, and other high-speed protocol environments.The SierraNet Family of Ethernet test platforms provides best in class traffic capture, analysis, and manipulation for testing physical link characteristics and application operations. SierraNet is designed for addressing today’s high-speed storage and communications network problems and compliments other tools offering industry leading visibility and utility.

  • USB Power Delivery and Type-C™ Tester & Analyzer

    GRL-USB-PD-C2 (GRL-C2) - Granite River Labs Inc.

    GRL-USB-PD-C2 (GRL-C2) is the only solution available that supports all compliance test specifications for USB Power Delivery 3.0 and USB Type-C Alternate Mode designs, and enables product developers to quickly run full compliance and validation test suites at the push of a button. GRL-C2 provides an automated, efficient, and fully-integrated way perform all required USB Power Delivery version 3.0 and 2.0 and related tests over the USB Type-C connector, as well as PHY test automation for USB Type-C Alternate Modes. GRL-C2 automates all required USB PD compliance tests for power providers (chargers), consumers, dual-role ports, and cable and adapter E-Markers; and is the only solution available that integrates Qualcomm Quick Charge 4+ and Intel Thunderbolt-specific test items. GRL-C2 also incorporates analyzer capability to sniff PD traffic. GRL-C2 integrates all required USB PD tests into a single 2-port tester, including all tests supported on GRL’s USB-IF approved first generation solution introduced in 2015. Each port can be configured independently as a PD Provider or Consumer. All other PD Protocol and Power tests are fully integrated, removing the need for external electronic loads.

  • Programmable DC Electronic Load

    63000 Series - Chroma ATE Inc.

    The 63000 Series programmable DC electronic loads are reliable, precision instruments primarily designed to test switching power suppl ies, A/D power suppl ies, power electronic components, adapters, 3C batteries and chargers. Its maximum 350W rated power makes it suitable for testing numerous types of lower power devices. The 63000 Series offers models in two operating voltages 150V models, with 250W and 350W power levels up to 60A in a single unit. Their compact and light weight design make these loads easy to move around which is ideal for R&D and design validation. Each model of the 63000 Series has unique user-def ined waveform (UDW) funct ion capable of simulating real-world custom waveforms. In addition, a data storage function has been built in for saving and recalling up to 100 stored settings at any time. For automated testing, these save and recall functions can save a great deal of time. The 63000 Series has 3 power ranges that can precisely measure the voltage and current in real time. Since short circuit testing is a critical test item, the 63000 provides short circuit simulation to effectively address application demands for power and automated testing.

  • Automated Test Equipment

    ATE - Frontier Electronic Systems Corp.

    The design, development, manufacture and integration of Automated Test Equipment (ATE) systems is a core technology focus for FES. Our engineers have designed and manufactured complex flight line test systems for military aircraft such as the F-15, F-18, C-17, B-1, B-52 and OV-22 aircraft. In 1994, FES developed the Common Core Test Set to test space systems electronics for the Defense Support Program (DSP). This open-architecture, high-reliability electronics test set has been upgraded over the last 20 years with new hardware and graphics-based software to accommodate the complex testing requirements associated with the International Space Station Rotary Joint Motor Controller and other satellite electronics. Maritime ATE systems designed and manufactured by FES include Radar & Video Distribution factory test systems supporting US and Canadian Navy customer production requirements. Core components of FES-developed ATE systems include the use of PXI/PCI/VXI/VME technologies, National Instruments Test Stand software, Agilent Technologies instrumentation, and Virginia Panel interface hardware. The FES ATE design team employs CMMI level 3 compliant processes throughout the design process from Systems Requirements Analysis through verification and validation of ATE compliance with customer hardware, software, and documentation requirements.

  • Fatigue Testing And Certification

    Hill Engineering, LLC

    Fatigue engineering is subject to uncertainty, and data from well executed tests are used to validate conclusions made by analysis and to provide a basis for structural certification. Our staff have extensive experience in testing materials and components under slowly varying, static loads, and under rapidly varying cyclic loads. Tests under static loads are used to assess material properties or to assess the load-deformation behavior of structural components. Tests under cyclic loads provide time to crack initiation, time to failure, or measurements of crack growth over time. We have extensive experience in measuring fatigue crack growth behavior in metallic materials. Past programs have measured crack growth with microscopy and photogrammetry at the surface, cracked area with direct current potential drop, and through-thickness crack profiles with quantitative fractography. By assessing crack growth with a variety of experimental methods, we enable robust analysis validation for cases of complex cracking. Our capabilities in fatigue engineering allow for careful design of a fatigue test program. Whether the tests use constant amplitude loading or an irregular loading spectrum, we specialize in engineering the test that meet your needs. Much of our experience is in non-standard test programs, which require engineering to optimize the test setup. Few others match our capability and experience in fatigue test engineering.

  • FPGA Image Processing (IP) Development Kit

    ProcVision - Gidel

    Gidel’s Vision Pro Development Kit is an optimal solution for developing,validating, demonstrating and evaluating Image Processing (IP) andpipeline designs on FPGA.The suite is designed to provide a complete and convenient envelop enablingthe developer to focus strictly on the proprietary image processingdesign. The entire Vision Pro flow is within a single FPGA, independentof the final target application(s). The Vision Pro flow is composedof a pipeline that streams simulated data to the user image processingdesign under test (DUT) and then captures the design’s output streamfor displaying, storing, analysis and/or co-processing on host software.The entire process is performed on a single FPGA without the need foradditional peripheral connectivity or tools.Vision Pro suite is plug-and-play enabling the developer to begin at oncethe IP design development and validation. A simple design example providesthe developer immediate hands-on familiarization with the systemflow and supporting tools. The final design can be ported to any IntelFPGA device or other vendors’ devices (FPGA or ASIC) by replacing basiclibraries. To significantly reduce compilation time, initial design developmentmay be on a small FPGA device and later compiled for the targetdevice(s). The target implementation may use any FPGA board. For a fullImaging/Vision system solution, Gidel offers a number of off-the-shelfgrabbers and FPGA accelerators that are designed to utilize these imageprocessing blocks and Gidel Imaging Library (GIL).

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