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BSDL File Validation
Corelis offers services to validate the accuracy of Boundary-Scan Description Language (BSDL) files that characterize the boundary-scan functionality of semiconductor devices. These services include validation of a device's BSDL file while the chip is still in development and BSDL file accuracy verification against actual silicon.
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BSDL models for Verilog, LASAR, HILO
MODBSDL
MODBSDL Software reads a BSDL file and writes an ACUGEN-format simulation model. This model can then be simulated and fault graded using ACUGEN's ATGEN product, or converted to another simulation format.
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Boundary Scan
PROGBSDL
PROGBSDL software converts a BSDL file for an unprogrammed PLD into a BSDL file with the same pin usage as the programmed PLD.
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Boundary Scan Software
ACUTAP Toolkit
The ACUTAP Toolkit is a handy collection of tools for reading, writing, modifying, checking, testing and working with BSDL files and boundary scan testing situations.
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Develop - Simulate - Validate JTAG / IJTAG based IP
NEBULA
You, your vendors and your customers being able to use one common interface to control and observe on-chip IP, resources and instruments. The figure below shows an example IC. The new IEEE 1149.1-2013 standard supports an init-data register for configuring the analog paramaters of I/O as well as controlling on-chip PLLs. The standard further extends this by defining in BSDL user test data registers or 'scan chains'. These registers enable the ability of generic software to control and observe mission mode IP and instruments simply by describing the register interface in BSDL.
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Boundary Scan
TurboBSD
TurboBSD is SynTest high-performance Boundary Scan Designer. It is 100% compliant to the IEEE 1149.1 Boundary Scan Standard. TurboBSD performs Boundary Scan logic synthesis, creates BSDL (Boundary Scan Description Language) file, and generates Boundary Scan test patterns
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Development Software Suite
JTAG ProVision
The JTAG ProVision software suite is used to generate boundary-scan tests and in-system programming applications for assembled PCBs and systems. This professional development tool is fully automated and supports the import of design data from over 30 different EDA and CAM systems. Other key data inputs are JTAG device BSDL models and a large, well-maintained model library describing thousands of non-JTAG devices.
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Flash Memory In-System Programming File Generation
ScanExpress Flash Generator
ScanExpress Flash Generator is a tool to quickly create Flash programming files for use with ScanExpress™ software. The application operates as a standalone utility or integrates into ScanExpress TPG for creation and reuse of boundary-scan test files for in-system programming (ISP).ScanExpress Flash Generator combines a board Netlist, scan chain description, and BSDL files to automatically create Flash Programming Information (FPI) files. These files include all information necessary for ScanExpress Runner™ or ScanExpress Programmer™ execution systems to perform read, write, erase, and verify operations—in-system using high performance Corelis hardware.
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Boundary-Scan DIMM Socket Tester
ScanDIMM
Maximizing test coverage is an important piece in test procedure development. Unfortunately, not all designs have the necessary requirements in place to accommodate boundary-scan test methods on memory devices. ScanDIMM digital socket test modules are designed to overcome such limitations when testing DIMM sockets utilizing boundary-scan test techniques.ScanDIMM modules provide the capability to instantly turn any DIMM socket into a fully compliant IEEE-1149.1 device. Integration is as simple as assigning the included BSDL file to the reference designator of the target socket and compiling test vectors.In multi-socket systems, multiple ScanDIMM modules can be linked to provide even greater boundary-scan test depth.
